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SSM4532M
COMPLEMENTARY N AND P-CHANNEL ENHANCEMENT-MODE POWER MOSFETS
Simple drive requirement
D2
N-ch
D2 D1 D1 G2 S2
BV ID
DSS
+30V 50m +5A -30V 70m -4A
Low on-resistance Fast switching
R DS(ON)
P-ch
BV DSS RDS(ON) ID
SO-8
S1
G1
Description
MOSFETs from Silicon Standard Corp. provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and costeffectiveness. The SO-8 package is widely preferred for commercial and industrial surface mount applications and is well suited for low-voltage applications such as DC/DC converters.
G1
D1
D2
G2 S1 S2
Absolute Maximum Ratings
Symbol VDS VGS I D @ TA=25C I D @ TA=70C I DM PD @ TA=25C TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltag Continuous Drain Current Continuous Drain Current Pulsed Drain Current
1,4 3 3
Rating N-channel +30 20 +5 +4 +20 2.0 0.016 -55 to 150 -55 to 150 P-channel -30 20 -4 -3.2 -20
Units V V A A A W W/C C C
Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range
Thermal Data
Symbol Rthj-amb Parameter Thermal Resistance Junction-ambient Max. Value 62.5 Unit C/W
Rev.2.01 7/01/2004
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SSM4532M
N-channel Electrical Characteristics @ Tj=25oC (unless otherwise specified)
Symbol BVDSS Parameter Drain-Source Breakdown Voltage Test Conditions VGS=0V, ID=250uA Min. 30 1 Typ. 0.037
Max. Units 50 70 3 1 25 100 20 12 18 30 12 360 210 80 V V/C m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
BV DSS/Tj
RDS(ON)
Breakdown Voltage Temperature Coefficient Reference to 25C, ID=1mA
Static Drain-Source On-Resistance
VGS=10V, ID=5A VGS=4.5V, ID=4.2A
8 10.2 1.2 3.4 6 9 15 5.5 240 145 55
VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Gate Threshold Voltage Forward Transconductance
Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=55oC)
o
VDS=VGS, ID=250uA VDS=10V, ID=5A VDS=30V, VGS=0V VDS=24V, VGS=0V VGS=20V ID=5A VDS=10V VGS=10V VDS=10V ID=1A RG=6,VGS=10V RD=10 VGS=0V VDS=25V f=1.0MHz
Gate-Source Leakage Total Gate Charge
2
Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
2
Source-Drain Diode
Symbol IS ISM VSD Parameter
Continuous Source Current ( Body Diode )
Test Conditions VD=VG=0V , VS=1.2V
1
Min. -
Typ. 0.8
Max. Units 1.7 20 1.2 A A V
Pulsed Source Current ( Body Diode )
Forward On Voltage
2
Tj=25C, IS=1.7A, VGS=0V
Notes:
1.Pulse width limited by max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10sec. 4.Pulse width <10us , duty cycle <1%.
Rev.2.01 7/01/2004
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SSM4532M
P-channel Electrical Characteristics @ Tj=25oC (unless otherwise specified)
Symbol BVDSS Parameter Drain-Source Breakdown Voltage Static Drain-Source On-Resistance Gate Threshold Voltage Forward Transconductance
Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=55 C)
o o
Test Conditions VGS=0V, ID=250uA VGS=-10V, ID=-4A VGS=-4.5V, ID=-3A VDS=VGS, ID=-250uA VDS=-10V, ID=-4A VDS=-30V, VGS=0V VDS=-24V, VGS=0V VGS= 20V ID=-4A VDS=-10V VGS=-10V VDS=-10V ID=-1A RG=6,VGS=-10V RD=10 VGS=0V VDS=-25V f=1.0MHz
Min. -30 -1 -
Typ. -0.028
Max. Units 70 90 -3 -1 -25 100 36 16 18 40 20 1140 518 135 V V/C m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
BVDSS/ Tj
RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Breakdown Voltage Temperature Coefficient Reference to 25C, ID=-1mA
5 18.3 3.6 1.5 8 9 21 10 760 345 90
Gate-Source Leakage Total Gate Charge
2
Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
2
Source-Drain Diode
Symbol IS ISM VSD Parameter
Continuous Source Current ( Body Diode )
Test Conditions VD=VG=0V , VS=-1.2V
1
Min. -
Typ. -
Max. Units -1.7 -20 -1.2 A A V
Pulsed Source Current ( Body Diode )
Forward On Voltage
2
Tj=25C, IS=-1.7A, VGS=0V
Notes:
1.Pulse width limited by max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10sec. 4.Pulse width <10us , duty cycle <1%.
Rev.2.01 7/01/2004
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SSM4532M
N-channel
70 50
T C =25 C
60
o
V G =10V
40
T C =150 o C V G =10V
V G =8.0V
50
ID , Drain Current (A)
ID , Drain Current (A)
V G =8.0V
30
40
V G =6.0V
V G =6.0V
20
30
20
V G =4.0V
10
V G =4.0V V G =3.0V
10
V G =3.0V
0 0 1 2 3 4 5 6 7 8 9 0 0 1 2 3 4 5 6 7
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
85
1.8
75
Id=5A T c =25C
1.6
I D =5A V G =10V
RDSON (m )
65
Normalized RDS(ON)
3 4 5 6 7 8 9 10 11
1.4
1.2
55
1.0
45 0.8
35
0.6 -50 0 50 100 150
V GS (V)
T j , Junction Temperature ( o C)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance vs. Junction Temperature
Rev.2.01 7/01/2004
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SSM4532M
N-channel
6 3
5
ID , Drain Current (A)
4
2
3
PD (W)
1 0 25 50 75 100 125 150 0 50 100 150
2
1
0
T c , Case Temperature ( o C)
T c ,Case Temperature ( o C)
Fig 5. Maximum Drain Current vs.
Fig 6. Typical Power Dissipation
Case Temperature
100
1
DUTY=0.5
Normalized Thermal Response (Rthja)
0.2
10
0.1
0.1
0.05
ID (A)
0.02
10us
1
0.01
P DM
100us 1ms T c =25 o C Single Pulse 10ms 100ms
0.01
t T
SINGLE PULSE
Duty factor = t/T Peak Tj = PDM x Rthja + Ta
0.1 0.1 1 10 100
0.001 0.0001 0.001 0.01 0.1 1 10 100 1000
V DS (V)
t , Pulse Width (s)
Fig 7. Maximum Safe Operating Area
Fig 8. Effective Transient Thermal Impedance
Rev.2.01 7/01/2004
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SSM4532M
N-channel
12
1000
f=1.0MHz
10
VGS , Gate to Source Voltage (V)
I D =5A V DS =10V Ciss
8
6
C (pF)
Coss
100
Crss
4
2
0 0 2 4 6 8 10 12
10 1 5 9 13 17 21 25 29
Q G , Total Gate Charge (nC)
V DS (V)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
100.00
3
2.5
10.00
2
T j =150 o C IS(A) T j =25 o C
1.00
VGS(th) (V)
1.3 1.5
1.5
1
0.10
0.5
0.01 0.1 0.3 0.5 0.7 0.9 1.1
0 -50 0 50 100 150
V SD (V)
T j ,Junction Temperature ( o C)
Fig 11. Forward Characteristic of
Fig 12. Gate Threshold Voltage vs.
Reverse Diode
Junction Temperature
Rev.2.01 7/01/2004
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SSM4532M
N-channel
VDS
RD
90%
D
VDS
TO THE OSCILLOSCOPE 0.33x RATED VDS
RG
G
+ 10V -
S VGS
10% VGS td(on) tr td(off) tf
Fig 13. Switching Time Circuit
Fig 14. Switching Time Waveform
VG
VDS TO THE OSCILLOSCOPE
QG 10V
D
0.33 x RATED VDS G S
+
QGS
QGD
VGS
1~ 3 mA
I
G
I
D
Charge
Q
Fig 15. Gate Charge Circuit
Fig 16. Gate Charge Waveform
Rev.2.01 7/01/2004
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SSM4532M
P-channel
20
20
T C =25 C
o
V G =-10V V G =-8.0V
T C =150 o C
V G =-10V V G =-8.0V
15
15
-ID , Drain Current (A)
V G =-4.0V
10
-ID , Drain Current (A)
V G =-6.0V
V G =-6.0V
10
V G =-4.0V
5
5
0 0 1 2 3 4
0 0 1 2 3 4 5
-V DS , Drain-to-Source Voltage (V)
-V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
90
1.8
80
Id=-4.0A T c =25C
I D =-4.0A
1.6
V G = -10V
60
Normalized RDS(ON)
70
1.4
RDSON (m )
1.2
50
1
40
0.8
30 3 4 5 6 7 8 9 10 11
0.6 -50 0 0 5 100 150
-V GS (V)
T j , Junction Temperature ( C)
o
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance vs. Junction Temperature
Rev.2.01 7/01/2004
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SSM4532M
P-channel
5
3
2.5
4
-ID , Drain Current (A)
2
3
PD (W)
2 1 0 25 50 75 100 125 150
1.5
1
0.5
0 0 50 100 150
T c , Case Temperature ( o C)
T c ,Case Temperature ( o C)
Fig 5. Maximum Drain Current vs.
Fig 6. Typical Power Dissipation
Case Temperature
100
1
DUTY=0.5
Normalized Thermal Response (R thja)
0.2
10
0.1
0.1
0.05
-ID (A)
10us 100us
1
0.02
0.01
PDM
0.01
SINGLE PULSE
t T
Duty factor = t/T Peak Tj = P DM x Rthja+ Ta
1ms T c =25 o C Single Pulse
0.1 0.1 1 10 100
10ms 100ms
0.001 0.0001
0.001
0.01
0.1
1
10
100
1000
-V DS (V)
t , Pulse Width (s)
Fig 7. Maximum Safe Operating Area
Fig 8. Effective Transient Thermal Impedance
Rev.2.01 7/01/2004
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SSM4532M
P-channel
12
10000
f=1.0MHz
10
-VGS , Gate to Source Voltage (V)
I D =-4A V DS =-10V
8
1000
Ciss Coss
6
4
C (pF)
100
Crss
2
0 0 2 4 6 8 10 12 14 16 18 20
10 1 5 9 13 17 21 25 29
Q G , Total Gate Charge (nC)
-V DS (V)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
100.00
3
2.5
10.00
T j =150 o C
2
-IS(A)
T j =25 o C
1.00
-VGS(th) (V)
1.5
1
0.10
0.5
0.01 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5
0 -50 0 50 100 150
-V SD (V)
T j ,Junction Temperature ( o C)
Fig 11. Forward Characteristic of Reverse Diode
Fig 12. Gate Threshold Voltage vs. Junction Temperature
Rev.2.01 7/01/2004
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SSM4532M
P-channel
VDS
RD
90%
D
VDS
TO THE OSCILLOSCOPE 0.33 x RATED VDS
RG
G
10%
S -10 V VGS
VGS td(on) tr td(off) tf
Fig 13. Switching Time Circuit
Fig 14. Switching Time Waveform
VG
VDS TO THE OSCILLOSCOPE
QG -10V
D
G S -1~-3mA I
G
0.33 x RATED VDS
QGS
QGD
VGS
ID
Charge
Q
Fig 15. Gate Charge Circuit
Fig 16. Gate Charge Waveform
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.
Rev.2.01 7/01/2004
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